A composite color video signal includes horizontal synchronizing signals, a burst signal superimposed onto the pedestal level at the back porch of the horizontal synchronizing signal and a video information signal. The video information signal comprises a chrominance subcarrier having different phases amplitude-modulated with chrominance information. The composite color video signal includes both luminance and chrominance information. Separator circuits are utilized to separate the horizontal synchronizing signal and the burst signal from the incoming video signal. The burst signal has a burst signal frequency equal to 3.58 MHz, which is the frequency of the chrominance subcarrier f.sub.SC.
The video signal can also be separated into a separate chrominance or C signal and separate luminance or Y signal. A properly configured television, monitor or display will accept the separate chrominance C and luminance Y signal. Within the video signals, the values of the components are determined by their relative amplitude with respect to the blank or pedestal level. It is therefore essential that the blank or pedestal level is maintained at a known level so that the value of the components can be readily determined by the system. The blank level of a video signal is typically clamped to a known DC level allowing the values of the components within the signal to be determined by comparing their amplitude with respect to the known DC level. The blank level of the separate chrominance C and luminance Y signals must also be clamped to a known blank or pedestal level in order to determine the true values of their components.
A video encoder circuit of the prior art with four clamping circuits is illustrated in FIG. 1. The video encoder circuit receives an RGB signal and generates a composite video signal, a separate luminance signal Y and a separate chrominance signal C from the RGB signal. The RGB signal includes separate Red, Green and Blue signals which are combined within the encoder 10, into the separate luminance signal Y, by a Y-matrix circuit 12. It should be apparent that the encoder circuit 10 also includes circuitry to encode the composite video signal CV and the separate chrominance signal C, which is not illustrated in FIG. 1. The Y-matrix circuit 12 combines each of the Red, Green and Blue signals in accordance with an appropriate weighting factor to obtain weighted signals, for forming the separate luminance signal Y. The equation implemented by the Y-matrix circuit is: EQU Y=0.30*R+0.59*G+0.11*B (1)
Accordingly, in order to derive the separate luminance signal Y, the Red, Green and Blue input signals are combined according to equation (1), with the Red, Green and Blue signals comprising unequal components of the separate luminance signal Y.
When bringing electrical signals into a system from an outside system, it is typically necessary to shift the signals into an appropriate voltage range to compensate for any difference in signal voltage resulting from a difference in absolute ground potential between the two systems. This operation is performed by a clamping circuit which shifts the range of the signals into the range expected by the receiving system. For a video signal, as described above, such a clamping circuit will clamp the blank level of the signal to a known level, in order that the components of the signal can be readily determined.
As illustrated in FIG. 1, the clamping circuits 14, 16 and 18 are used to adjust the Red, Green and Blue input signals received from an outside system, to an appropriate level expected by the Y-matrix circuit 12. The clamping circuits 14, 16 and 18 shift the blank levels of the Red, Green and Blue input signals, respectively, to a known DC level.
The Y-matrix circuit 12 combines the clamped Red, Green and Blue input signals, in a weighted fashion according to equation (1), to form the separate luminance signal Y which is provided from the output of the Y-matrix circuit 12. A fourth clamping circuit 20 is then used to shift the DC voltage level of the separate luminance signal Y provided from the Y-matrix circuit 12, before it is output from the video encoder circuit 10.
The clamping circuits 14, 16, 18 and 20 require extra circuitry to be added to the video encoder circuit 10. Each clamping circuit typically includes a large capacitor which is external to the video encoder circuit 10. Not only do these large capacitors take up valuable space within the system, but when the video encoder circuit 10 is implemented within an integrated circuit, a pin for each of these external capacitors is required, thus increasing the necessary size of the video encoder circuit 10.
In order to drive state-of-the-art high performance monitors the clamping circuits must also be capable of passing signals at speeds of at least 33 MHz. Conventional approaches utilize a differential amplifier with high speed NPN and PNP transistors to replicate the video signal for driving such high performance monitors. As is well known among those skilled in the art, such high-speed PNP transistors are expensive to include within a system or integrated circuit. Accordingly, such a conventional approach requires a relatively expensive process to manufacture and is still unable to meet the speed requirements for driving high performance monitors. What is needed is a clamping circuit which requires less external components, takes up less space and provides higher performance characteristics than conventional designs without using high speed PNP transistors.